FPGA Design

We can help with your requirements from system architecture analysis and design to module level designs. If you are unsure of what your requirements are, we can help create a specification for a design, or even decide if using an FPGA/CPLD is the most appropriate solution to your problem.

Our FPGA design background was originally within the Telecomms industry designing for Sonet/SDH, ATM and Ethernet projects. These designs tended to use the latest leading edge low volume high cost system on a chip type devices. We have also completed many smaller designs with higher volume lower cost devices where the FPGA cost is a significant factor in product price. The limitation of the resources in these smaller devices must be borne in mind more when approaching these designs.

Most of our experience is with Altera and Xilinx devices and tool sets, with Modelsim for design test and verification and Synopsys’ Design Compiler, Synplicity’s Simplify and Mentor Graphics’ Leonardo for design synthesis. We have completed designs for Altera’s CycloneIII, CycloneII, Cyclone, 20K, Acex, 10K series FPGAs and MAXII, Max7000 series CPLDs; Xilinx VirtexII, VirtexE, SpartanII and SpartanII-E series FPGAs. We have also designed for Atmel CLDS and are currently translating a customer design to an Actel device for higher IP security for volume off shore manufacturing.

We have our own tools which allow designs to be targeted at Altera or Xilinx (and now Actel) FPGAs and so can accept outsourced work (our preferred operating mode) or we can provide an engineer to work at a client’s site within the UK.

We have experience of implementing Xilinx’s Picoblaze ‘soft CPU’ (see the downloads page for details) and can deliver SOPC designs based around Altera’s NIOSII CPU core. See the SOPC page for more details.

Project Lifecycle

The life cycle of a project will depend somewhat on the scale of development. For a small project when a specification has been agreed (this might only be a couple of pages) we would aim to complete our development and deliver the completed package in one drop, with several days support for integration/testing if needed.

On the large projects we would expect to spend some time up front working with client’s engineers to ensure we agree on specifications and deliverables. We would then start our development, continuing close communication with the client and delivering interim design deliveries/progress reports as required. We can be available for integration/testing support for these interim deliveries. At the end of our development phase we will be available for a longer period of support to allow full product testing.

Design Specification

As discussed above, we will work to agree a design description document before the FPGA/Hardware design aspects of a project are started. This will specify detailed requirements for a design, what will be tested and to what level (are fully automated self checking test benches needed etc?), target device, clock speeds, interim deliveries etc. If a client is unsure about what is required we will work with them to help derive this specification.

We have fast Internet access with VPN (virtual private network) capabilities so communication can be fast and efficient. We will make every effort to have a series of face to face meetings to discuss requirements at this stage. Having a fully detailed design specification with a check list of verification points is the ideal, but if the project is small this specification can be much briefer.

Having witnessed several successful outsourcing projects while working on-site with major clients we are convinced that a significant contributing factor to the success was the amount of effort that was spent on design specification at the start of the project.

This is an interesting article about writing a spec before starting a design. It’s written from a software engineering perspective but is very relevent to hardware development.

Coding Styles

We can tailor our coding style to follow any style guide a customer specifies. It is generally recognized that maintaining a consistent coding style across a development team makes maintenance, debug and re-use easier. By following a customers style guide integration, maintenance and reuse of our designs is simplified.


In order to speed up the system level verification of designs we have a skeleton transaction based testbench prepared. This can be quickly modified to allow fast and adaptable, text file configured tests to be performed on a target design. Alternately we can design our testbenches around a customers defined testbench structure.

GUI or Scripting?/Directory Structure etc.

If we are developing a module which is to be integrated in a larger project we can deliver the design built with a set of scripts which meet a client’s template. Alternately we can provide an archived project directory so the client can re-build the design using the different tool GUIs. We can also deliver the design to match whatever directory structure is required.

Deliverables and Milestones

Deliverables and milestones should be agreed as part of the requirement specifiation. These may include early versions of a design to allow a client to start integration/testing with their target system. These may also include an agreed period of integration/debug and test support at the client’s site. We will be as flexible as possible to meet customers requirements.

Version Control and Archiving

Version control and archiving of designs under development is essential to ensure that time is not wasted if a development machine crashes or similar disasters occur. We use a simple version control tool QVCS from http://www.qumasoft.com to track development versions and regularly archive designs off site.

Accepting Work

One of our most important goals is to keep our customers happy. Satisfied customers leading to repeat work is our ultimate goal. With this in mind we will not accept a project unless we are confident we have the resource to complete it on time and within budget.